xiongdh
Joined: 18 Jul 2002
Posts: 76
Helped: 1
Location: china mainland
|
 28 Apr 2003 6:03 ncverilog sdf |
|
|
|
|
How can i annotate SDF file as Using NC-verilog.
As I use the following words in testbench:
$sdf_annotate ("sdffile.sdf", "module_name", ,"sdffile.log");
I find Nc-verilog can't recognize this mode.because there is no error report when I use an invalid sdf file.
I use another way to back annotate.The tool I use is "Virtuoso Schematic Composer Analysis Environment For NC-verilog Integration".I enable it from "Virtuoso Schematic Reading".After setting in the menu->setup->sdf delay annotate of this tool.a file sdf2sdf.log was created.there are many warnings in this log file.part of this was showed like:
simViewName = "schematic"
Hierarchy divider / will be mapped to .
WARNING - Instance does not have a mapped name
WARNING - Cannot find pinmap data for instance U98 (master ), pin N01.
WARNING - The verilog model is . Using original pin name for this pin.
WARNING - Cannot find pinmap data for instance dcon_7_reg (master ), pin H02.
WARNING - The verilog model is . Using original pin name for this pin.
WARNING - Cannot find pinmap data for instance databus_tri[7] (master ), pin N01.
***********************************************
in the end of the file report like this:
SDF name mapping completed successfully
Who can tell me how i can back annotate sdf file in NC-verilog?
|
|
rod_wu
Joined: 15 Jul 2002
Posts: 24
|
28 Apr 2003 7:12 sdf_annotate |
|
|
|
|
$sdf_annotate ("sdffile.sdf", "module_name", ,"sdffile.log");
That "module_name" must met your design !!
Ex: module testbench();
m1 m1_0(............);
m2 m2_0(............);
........................
endmodule
module m2(.......);
m3 m3_0(........................);
m4 m4_0(........................);
.....................
endmodule
So: "module_name" = testbench.m1_0 if sdf file is base m1 module.
===> $sdf_annotate ("m1.sdf", "testbench.m1_0", ,"sdffile.log");
or
"module_name" = testbench.m2_0.m3_0 if sdf file is base m3 module
===> $sdf_annotate ("m3.sdf", "testbench.m2_0.m3_0 ", ,"sdffile.log");
|
|
